1. Field of the Invention
The present invention relates to word line drivers powered by a power supply with limited current driving ability, such as a charge pump, in integrated circuit memory devices; and specifically to memory devices including word line drivers powered with a boosted voltage during a read mode.
2. Description of the Related Art
Decreased power consumption and faster operating speeds are continuing trends in integrated circuit design. Lower voltages generally result in lower power operation. Standards are emerging that power integrated circuits at voltages lower than the typical 5 volts at present. For example, one low supply voltage which is emerging as a standard is specified to operate over a range of about 2.7 to 3.6 volts. Other, even lower supply potential standards are emerging. Low voltage supply ranges fall short of voltages needed for important applications. For example, in semiconductor memory devices, such as flash EEPROM or ROM, word lines may operate at a read potential of 4 volts or more. Voltage supply boosting circuitry is included on the integrated circuit to supply the required on chip voltages. Such boosting circuits have limited current driving capability, and thus limit the speed of devices.
The performance of boosting circuits is also limited by capacitance, which includes parasitic capacitance and the capacitance of drivers which rely on the boosted voltage. During a voltage boosting step, capacitance delays the voltage boost operation and increases the power required from the voltage boost circuits. Some major sources of capacitance are well capacitance, interconnect capacitance, oxide capacitance, and junction capacitance. Accordingly, it is desirable to provide a circuit for use with integrated circuits that decreases capacitance generally, and particularly decreases the capacitive load on the boosted voltage source during voltage boost operations.